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Suitable Total Process Integration of Plasma Dicing for Each Device Category

NOV
13
2019
13. NOV 2019

Presentation Halle ICM - Internationales Congress Center München SEMICON EUROPA > Advanced Packaging Conference > Session 4: New Materials and Processing in Packaging

10:05-10:30 Uhr | ICM - Internationales Congress Center München ICM Room 13b, 1st Floor

Themen: SEMICON EUROPA

Chairman: Jens Mueller (, Test)

Format: Presentation

Sprache: Englisch

With the evolution of advanced package technology of electronic components and semiconductor, demands have become severe for chip thinning, miniaturization, flexibility, and high reliability [1].Plasma dicing is a promising singulation technology that dices wafers mounted on ring frames by plasma processing. It can offer many advantages over other dicing methods for thinning / miniaturization of chips, improvement in chip flexural strength, damage-less / particle-less processing and cost reduction [2].To introduce plasma dicing it is necessary to optimize the total process integration and plasma dicing conditions according to chip size and structure of each device.For small size devices without TEG on the dicing street, the process flow using photolithography mask is effective. Very small size, narrow streets and odd shaped chips can be realized by plasma dicing. The mask can be removed by ashing, but if there are high bumps, the ashing time will be longer and CoO (Cost of Owner-ship) will be worse. Therefore, Panasonic developed a method to remove the mask in the ring frame mounting state using a chemical without dicing tape damage. As a result, Panasonic have been able to provide a total process that enables mask removal without residue without deteriorating CoO.In case of dicing street with TEG, singulation can be realized by a hybrid process combining laser grooving and plasma dicing. By using a suitable water-soluble mask for the same method, it was possible to remove the mask without residue after dicing, while forming and protecting the mask on structures such as bumps.[1] S. Okita, Plasma Technologies Ease Wafer Manufacturing of IoT Devices, AEI February 2017[2] S Okita, Improvement of the chip flexural strength by the Plasma Dicing technology, 2015 International Symposium on Dry Process

Informationen

Shogo Okita

Shogo Okita is the chief engineer at Panasonic Smart Factory Solutions, currently involving the development of plasma dicing equipment and process as well as the total process integration of plasma dicing.In 1997, he joined Matsushita Electric Industrial Co.,Ltd. (now, Panasonic Co.,Ltd.) as a process engineer. Since then, he has been engaged in R&D activity and product development and worked in development of various plasma sources and processes for dry etching equipment in the Si & Compound semiconductor, MEMS and LCD devices fields. He is the author of many patents.He received the B.S. degree in physics from Kwansei Gakuin University, Japan.

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